In a typical radio system (see FIG. 1), information is modulated onto a radio carrier by a transmitter. This signal then travels via an unknown and changing environment to the receiver. The ability to remove the effects of the environment from the signal is often key to the performance of a receiver.
The transmitter 101 passes information bits through a block adding error protection coding 102 and then through a modulation block 103 which modulates the coded information onto a radio carrier. As part of the modulation, known symbols may be added to assist with radio channel estimation in the receiver.
Once transmitted, the radio signal then passes through the radio channel 104 before reception 108. This radio channel frequently gives rise to Inter-Symbol Interference (ISI) which must then be removed by the receiver to ensure correct reception. Before being processed by the receiver blocks, the signal also acquires both interference and noise. The interference arises from other users of the spectrum whilst the noise is thermal noise from the environment. Additional noise is then added as the signal passes through the Rx front end 105.
The receiver 108 converts the analogue radio signal to a digital base band signal in the Rx front-end 105. The signal is then passed through the demodulation block 106. This serves to estimate the transmitted coded-bits in the presence of the ISI, interference and noise added by the radio channel and the Rx front end. The signal is then decoded 107 to yield the final received information bits.
The quality of service experienced by the user as well as the overall capacity of the system depends largely on the selected implementation of the demodulation unit. For W-CDMA systems, it is typical to use a Rake architecture in the receiver (CDMA—Principles of Spread Spectrum Communication, Andrew J. Viterbi, Addison-Wesley Wireless Communications Series). The Rake receiver combines the contributions from the different paths in the propagation channel in order to generate samples to be processed by the channel decoder. The Rake receiver is therefore able to exploit the diversity provided by the propagation channel. However, the decisions generated by the Rake receiver suffer from an increase in noise level due to ISI.
High-Speed Downlink Packet Access (HSDPA) is an evolution of the Release 99 version of the 3GPP standard aimed at providing improved user experience through increased data rates and reduced end-to-end latency. These improvements are delivered through a combination of Incremental Redundancy (IR) and the use of higher-order modulation schemes. HSDPA extends the capabilities of 3GPP by introducing the use of the 16QAM modulation for the data bearing channels. The 16QAM modulation is more spectrally efficient than the QPSK modulation used in 3G. However, it is also more sensitive to impairments introduced in the transmission link. Hence, in order to fully exploit the benefits of the new features introduced in HSDPA, it is important to select an implementation of the demodulation unit which is resistant to noise and interference.
Recently, new receiver architectures have been introduced where the demodulation accuracy is improved at the expense of the implementation complexity. The Linear Minimum Mean Square Error (LMMSE) equaliser is an example of such an architecture (Chip-Level Channel Equalization in WCDMA Downlink, K Hooli, M Juntti, M. J. Heikkila, P. Komulainen, M Latva-aho, J. Lilleberg, EURASIP Journal on Applied Signal Processing, August 2002). The LMMSE equaliser improves the performance of the demodulation unit by mitigating the distortions introduced by the propagation channel. The LMMSE equaliser can be implemented using a pre-filter Rake architecture (Equalization in WCDMA terminals, Kari Hooli, PhD thesis, 2003) where the conventional Rake receiver is preceded by a linear filter which aims at removing the ISI introduced by the channel.
In most propagation environments, the link level performance of the linear equaliser will be significantly better than that of the more conventional Rake receiver. It should however be noted that this improvement in performance is achieved at the expense of the implementation complexity. This will have a negative impact on the die-size and power-consumption of the receiver.
One of the major sources of complexity in the implementation of the receiver comes from the large number of different operation modes that are required. The information intended for a user may be sent over more than one logical channel. In HSDPA for example, the information is sent over the combination of one control and one dedicated channel. The dedicated HS-DSCH channel contains the information intended for a specific user. The HS-SCCH control channel is used to carry information on the format of the HS-DSCH transmission. Hence, both the HS-SCCH control channel and the HS-DSCH dedicated channel need to be processed at the receiver in order to recover the transmitted information. The HS-SCCH and HS-DSCH channels are transmitted with different formats. The HS-SCCH channel uses a spreading factor equal to 128 and is always QPSK modulated. The spreading format of the HS-DSCH is lower and equal to 16. The proposed architecture makes it possible to efficiently receive and demodulate the different channels processed by the receiver.